v850 Dependent Features
***********************

Options
=======

AS supports the following additional command-line options for the V850 processor family:

-wsigned_overflow
     Causes warnings to be produced when signed immediate values overflow the space available for then within their opcodes.  By default this option is disabled as it is possible to receive spurious warnings due to using exact bit patterns as immediate constants.

-wunsigned_overflow
     Causes warnings to be produced when unsigned immediate values overflow the space available for then within their opcodes.  By default this option is disabled as it is possible to receive spurious warnings due to using exact bit patterns as immediate constants.

-mv850
     Specifies that the assembled code should be marked as being targeted at the V850 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

-mv850e
     Specifies that the assembled code should be marked as being targeted at the V850E processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

-mv850e1
     Specifies that the assembled code should be marked as being targeted at the V850E1 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

-mv850any
     Specifies that the assembled code should be marked as being targeted at the V850 processor but support instructions that are specific to the extended variants of the process.  This allows the production of binaries that contain target specific code, but which are also intended to be used in a generic fashion.  For example libgcc.a contains generic routines used by the code produced by GCC for all versions of the v850 architecture, together with support routines only used by the V850E architecture.

-mv850e2
     Specifies that the assembled code should be marked as being targeted at the V850E2 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

-mv850e2v3
     Specifies that the assembled code should be marked as being targeted at the V850E2V3 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

-mv850e2v4
     This is an alias for -mv850e3v5.

-mv850e3v5
     Specifies that the assembled code should be marked as being targeted at the V850E3V5 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

-mrelax
     Enables relaxation.  This allows the .longcall and .longjump pseudo ops to be used in the assembler source code.  These ops label sections of code which are either a long function call or a long branch.  The assembler will then flag these sections of code and the linker will attempt to relax them.

-mgcc-abi
     Marks the generated object file as supporting the old GCC ABI.

-mrh850-abi
     Marks the generated object file as supporting the RH850 ABI.  This is the default.

-m8byte-align
     Marks the generated object file as supporting a maximum 64-bits of alignment for variables defined in the source code.

-m4byte-align
     Marks the generated object file as supporting a maximum 32-bits of alignment for variables defined in the source code.  This is the default.

-msoft-float
     Marks the generated object file as not using any floating point instructions - and hence can be linked with other V850 binaries that do or do not use floating point.  This is the default for binaries for architectures earlier than the e2v3.

-mhard-float
     Marks the generated object file as one that uses floating point instructions - and hence can only be linked with other V850 binaries that use the same kind of floating point instructions, or with binaries that do not use floating point at all.  This is the default for binaries the e2v3 and later architectures.

Syntax
======

Special Characters
------------------

# is the line comment character.  If a # appears as the first character of a line, the whole line is treated as a comment, but in this case the line can also be a logical line number directive (see Comments) or a preprocessor control command (see Preprocessing).

Two dashes (--) can also be used to start a line comment.

The ; character can be used to separate statements on the same line.

Register Names
--------------

AS supports the following names for registers:

general register 0
     r0, zero

general register 1
     r1

general register 2
     r2, hp

general register 3
     r3, sp

general register 4
     r4, gp

general register 5
     r5, tp

general register 6
     r6

general register 7
     r7

general register 8
     r8

general register 9
     r9

general register 10
     r10

general register 11
     r11

general register 12
     r12

general register 13
     r13

general register 14
     r14

general register 15
     r15

general register 16
     r16

general register 17
     r17

general register 18
     r18

general register 19
     r19

general register 20
     r20

general register 21
     r21

general register 22
     r22

general register 23
     r23

general register 24
     r24

general register 25
     r25

general register 26
     r26

general register 27
     r27

general register 28
     r28

general register 29
     r29

general register 30
     r30, ep

general register 31
     r31, lp

system register 0
     eipc

system register 1
     eipsw

system register 2
     fepc

system register 3
     fepsw

system register 4
     ecr

system register 5
     psw

system register 16
     ctpc

system register 17
     ctpsw

system register 18
     dbpc

system register 19
     dbpsw

system register 20
     ctbp

Floating Point
==============

The V850 family uses IEEE floating-point numbers.

V850 Machine Directives
=======================

.offset <EXPRESSION>
     Moves the offset into the current section to the specified amount.

.section "name", <type>
     This is an extension to the standard .section directive.  It sets the current section to be <type> and creates an alias for this section called "name".

.v850
     Specifies that the assembled code should be marked as being targeted at the V850 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

.v850e
     Specifies that the assembled code should be marked as being targeted at the V850E processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

.v850e1
     Specifies that the assembled code should be marked as being targeted at the V850E1 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

.v850e2
     Specifies that the assembled code should be marked as being targeted at the V850E2 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

.v850e2v3
     Specifies that the assembled code should be marked as being targeted at the V850E2V3 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

.v850e2v4
     Specifies that the assembled code should be marked as being targeted at the V850E3V5 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

.v850e3v5
     Specifies that the assembled code should be marked as being targeted at the V850E3V5 processor.  This allows the linker to detect attempts to link such code with code assembled for other processors.

Opcodes
=======

AS implements all the standard V850 opcodes.

AS also implements the following pseudo ops:

hi0()
     Computes the higher 16 bits of the given expression and stores it into the immediate operand field of the given instruction.  For example:

     mulhi hi0(here - there), r5, r6

     computes the difference between the address of labels 'here' and 'there', takes the upper 16 bits of this difference, shifts it down 16 bits and then multiplies it by the lower 16 bits in register 5, putting the result into register 6.

lo()
     Computes the lower 16 bits of the given expression and stores it into the immediate operand field of the given instruction.  For example:

     addi lo(here - there), r5, r6

     computes the difference between the address of labels 'here' and 'there', takes the lower 16 bits of this difference and adds it to register 5, putting the result into register 6.

hi()
     Computes the higher 16 bits of the given expression and then adds the value of the most significant bit of the lower 16 bits of the expression and stores the result into the immediate operand field of the given instruction.  For example the following code can be used to compute the address of the label 'here' and store it into register 6:

     movhi hi(here), r0, r6 movea lo(here), r6, r6

     The reason for this special behaviour is that movea performs a sign extension on its immediate operand.  So for example if the address of 'here' was 0xFFFFFFFF then without the special behaviour of the hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6, then the movea instruction would takes its immediate operand, 0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E).  With the hi() pseudo op adding in the top bit of the lo() pseudo op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 = 0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 - the right value.

hilo()
     Computes the 32 bit value of the given expression and stores it into the immediate operand field of the given instruction (which must be a mov instruction).  For example:

     mov hilo(here), r6

     computes the absolute address of label 'here' and puts the result into register 6.

sdaoff()
     Computes the offset of the named variable from the start of the Small Data Area (whose address is held in register 4, the GP register) and stores the result as a 16 bit signed value in the immediate operand field of the given instruction.  For example:

     ld.w sdaoff(_a_variable)[gp],r6

     loads the contents of the location pointed to by the label '_a_variable' into register 6, provided that the label is located somewhere within +/- 32K of the address held in the GP register.  [Note the linker assumes that the GP register contains a fixed address set to the address of the label called '__gp'.  This can either be set up automatically by the linker, or specifically set by using the --defsym __gp=<value> command-line option].

tdaoff()
     Computes the offset of the named variable from the start of the Tiny Data Area (whose address is held in register 30, the EP register) and stores the result as a 4,5, 7 or 8 bit unsigned value in the immediate operand field of the given instruction.  For example:

     sld.w tdaoff(_a_variable)[ep],r6

     loads the contents of the location pointed to by the label '_a_variable' into register 6, provided that the label is located somewhere within +256 bytes of the address held in the EP register.  [Note the linker assumes that the EP register contains a fixed address set to the address of the label called '__ep'.  This can either be set up automatically by the linker, or specifically set by using the --defsym __ep=<value> command-line option].

zdaoff()
     Computes the offset of the named variable from address 0 and stores the result as a 16 bit signed value in the immediate operand field of the given instruction.  For example:

     movea zdaoff(_a_variable),zero,r6

     puts the address of the label '_a_variable' into register 6, assuming that the label is somewhere within the first 32K of memory.  (Strictly speaking it also possible to access the last 32K of memory as well, as the offsets are signed).

ctoff()
     Computes the offset of the named variable from the start of the Call Table Area (whose address is held in system register 20, the CTBP register) and stores the result a 6 or 16 bit unsigned value in the immediate field of then given instruction or piece of data.  For example:

     callt ctoff(table_func1)

     will put the call the function whose address is held in the call table at the location labeled 'table_func1'.

.longcall name
     Indicates that the following sequence of instructions is a long call to function name.  The linker will attempt to shorten this call sequence if name is within a 22bit offset of the call.  Only valid if the -mrelax command-line switch has been enabled.

.longjump name
     Indicates that the following sequence of instructions is a long jump to label name.  The linker will attempt to shorten this code sequence if name is within a 22bit offset of the jump.  Only valid if the -mrelax command-line switch has been enabled.

For information on the V850 instruction set, see V850 Family 32-/16-Bit single-Chip Microcontroller Architecture Manual from NEC. Ltd.